Today is:   Feb 23, 2019

Brief Banners

Institute Mihailo Pupin
Institute Mihailo Pupin is the leading Serbian R&D institution in the field of Information & Communication Techologies.

Automation & Control Systems Ltd
The Automation & Control Systems Ltd is the core division of the Institute Mihailo Pupin, and the owner of the projects: ATLAS Systems and ATLAS-MAX.

The long list of the Institute's references and customers is the best proof of its high professional and techological achievments.

The other related IMP project: VIEW4 Software Package for control of complex processes

You are here:     ATLAS-MAX System Specification ATLAS-PT PLC Specification FB Diagrams
Function Block Diagrams

A Function Block Diagram – FBD is a diagram that describes a function between input variables and output variables.  A function is described as a set of mutually connected elementary blocks. Input and output variables are connected to blocks by connection lines. An output of a block may also be connected to an input of another block.  Function block diagram is one among five PLC languages supported by standard IEC 61131-3, but the most popular one.  The following example should help in understanding what a function block is:


Block MUX_R is a functional block that provides a simple multiplexing function.  From programming point of view, this block presents a program routine with well-defined input vs. output relationship, which in its executable form provides a supposed functionality.  Many simple functional blocks are saved in libraries, and could be later used in more complex functional diagrams (to accomplish more complex functions) - known as “ladder diagrams”.


The following example illustrates this approach.  Two conversion blocks are specified in the following ways:


Our task is to present a measured active power as percentage of its maximum value, and to indicate a specified threshold overflow.  To achieve this task, two presented conversion blocks are merged into a more complex diagram:


All input analogue data are AD converted with 12-bit resolution, meaning each input analogue data is converted into a number in the range (0-4095).  The conversion blocks CONV_RTW and CONV_WRT, together with a Word Comparator, are used to build a block diagram that converts input active power value (labeled here as: “AKTIVNA_SNAGA”) into the percentage range (0-100), and indicates if that value is above the threshold of 55.5%.  The presented example assumes the input active power value of the 72% of the maximum value, and the threshold bit 1.